Kelin J. Kuhn is an Intel Fellow, Technology and Manufacturing Group and director of Logic Device Technology. Kuhn is the device lead of the pathfinding team. Kelin Kuhn of Oregon State University, Oregon (OSU) with expertise in: Experimental Physics, Atomic, Molecular and Optical Physics and Solid State Physics. Dr. Kuhn received her B.S. in Electrical Engineering from the University of Washington, Seattle, WA (magna cum laude) in and the M.S. and Ph.D. in.

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Kelin Kuhn Inventions, Patents and Patent Applications – Justia Patents Search

The source region or the drain region, or combinations thereof, comprise a metal layer formed on the substantially all of the first side surface, substantially all of the second side surface, and the top surface. Only 1 left in stock more on the way.

The present disclosure relates to the field of fabricating microelectronic devices. Nanowire-based mechanical switching device. Silicon Valley Watcher — reporting from the disruptive intersection of technology and media. A semiconductor device comprises a substrate and a semiconductor body formed on the substrate. Amazon Second Chance Pass it on, trade it in, give it a second life.

Kelin Kuhn named Intel Fellow

Amazon Restaurants Food delivery from local restaurants. Get fast, kelni shipping with Amazon Prime. In at least one embodiment, the present disclosure relates to forming isolation kuhm in strained semiconductor bodies of non-planar transistors while maintaining strain in the semiconductor bodies. All Formats Paperback Sort by: Stephen M Cea, Martin D.


She received her master’s and doctoral degrees in electrical engineering from Stanford University in Some facts about Kuhn: Help us improve our Author Pages by updating your bibliography and submitting a new or current image and biography.

Kelin J. Kuhn

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Methods and apparatus to reduce layout based strain variations in non-planar transistor structures. The source region or the drain region, or combinations thereof, comprises a first side surface, a second side surface, and a top surface. The nanowire has an anchored portion and a suspended portion.

Women In Tech: Award Winning Chip Scientist Kelin Kuhn

Amazon Inspire Digital Educational Resources. Sign Up for our Newsletter. Inafter a decade at the University of Washington, Kuhn left her tenured position as an associate professor of electrical and computer engineering to join Intel. ComiXology Thousands of Digital Comics.

There’s a problem loading this menu right now. A nanowire device of the present description may include a highly doped underlayer formed between at least one nanowire transistor and the microelectronic substrate on which the nanowire transistors are formed, wherein the highly doped underlayer may reduce or substantially eliminate leakage and high gate capacitance which can occur at a bottom portion of a gate structure of the nanowire transistors.


Previously, Kuhn was a tenured faculty member in the Department of Electrical and Computer Engineering at the University of Washington. High to Low Avg.

Low to High Price: The semiconductor body comprises a source region; and a drain region.

Leaving tenure behind… Inafter a decade at the University of Washington, Kuhn left her tenured position as an associate professor of electrical and computer engineering to join Klein. Methods of forming low band gap source and drain structures in microelectronic devices.

Nanowire transistor fabrication with hardmask layers. Nanowire-based mechanical switching devices are described.

Learn more about Amazon Prime. The use of at least one hardmask may result in a substantially damage free uppermost channel nanowire in a keliin nanowire transistor, which may improve the uniformity of the channel nanowires and the reliability of the overall multi-stacked nanowire transistor.

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